| 902 Harga | |
| 001 Hak Akses (open/membership) | membership |
| 700 Entri Tambahan Nama Orang | Sklyarov, Valery, author |
| 336 Content Type | text (rdacontent) |
| 264b Nama Penerbit | Springer Cham |
| 049 No. Barkod | 20-23-56881192 |
| 110 Entri Utama Badan Korporasi | |
| 338 Carrier Type | online resource (rdacarrier) |
| 490 Seri | Lecture Notes in Electrical Engineering |
| 903 Stock Opname | |
| 053 No. Induk | 20-23-56881192 |
| 653 Kata Kunci | FPGA; optimization techniques; data processing; combinatorial optimization; hardware accelerators; xilinx |
| 040 Sumber Pengatalogan | LibUI eng rda |
| 245 Judul Utama | FPGA-BASED hardware accelerators |
| 592 Sumber Koleksi | Springerlink |
| 264c Tahun Terbit | 2019 |
| 650 Subyek Topik | Data processing; field programmable gate arrays; FPGA; FPGAs; system design; hardware |
| 904c Penginput Data Pengadaan | |
| 904b Pemeriksa Lembar Kerja | Henny-Desember2023 |
| 520 Ringkasan/Abstrak/Intisari | This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping boards. The methods proposed can be used in a range of data processing applications, including traditional sorting, the extraction of maximum and minimum subsets from large data sets, communication-time data processing, finding frequently occurring items in a set, and Hamming weight/distance counters/comparators. The book is intended to be a valuable support material for university and industrial engineering courses that involve FPGA-based circuit and system design. |
| 536 Catatan Informasi Pendanaan | BPPTN 2019 |
| 020 ISBN (R) | 9783030207212 |
| 090 No. Panggil Setempat | e20503039 |
| 245c Pertanggungjawaban | |
| 337 Media Type | computer (rdamedia) |
| 340 Bentuk Medium | pdf |
| 100 Entri Utama Nama Orang | Skliarova, Iouliia, author |
| 250 Edisi | |
| 264a Kota Terbit | Switzerland |
| 300 Deskripsi Fisik | xvi, 245 pages : illustration |
| 904a Pengisi Lembar Kerja | Kayla |
| 856 Akses dan Lokasi Elektronik | http://link.springer.com/openurl?genre=book&isbn=978-3-030-20721-2 |
| 041 Kode Bahasa | eng |