In this book along with the VHDL coding issues, the simulation and synthesis with the various toolsets enables the potential reader to visualize the final design. The VHDL design codes have been synthesized using different third party tools such as xilinx web pack Ver.11, modelsim PE, leonrado spectrum and synplify pro. Mixed flow illustrated by using the above mentioned tools presents an insight to optimize the design with reference to the spatial, temporal and power metrics.