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"Contents :- Foreword - The Microelectronics Desk Reference - System Level Failure Analysis Process: Making Failure Analysis a Value Add Proposition in today’s High Speed Low Cost PC environment - Board Level Failure Mechanisms and Analysis in Hand-held Electronic Products - Failure Analysis Flow for Package Failures - Wafer Level Failure Analysis Process Flow - Flip-Chip and “Backside” Sample Preparation Techniques - Failure Analysis in a Fabless/Outsourced World - Circuit Edit at First Silicon - The Process of Editing Circuits Through the Bulk Silicon - Curve Tracer Data Interpretation for Failure Analysis - A Primer on Simple Device Problems and Curve Tracer Characteristics - Electronics and Failure Analysis - Analog Device and Circuit Characterization - IC Testing: Background, Directions and Opportunities for Failure Analysis - Using Scan Based Techniques for Fault Isolation in Logic Devices - The Power of Semiconductor Memory Failure Signature Analysis - Common Defects Encountered During Semiconductor Manufacturing - System Level Board Fabrication and Assembly Process Anomalies and Associated Failures Categories - Characterization of Anomalies in Flip-Chip Solder Joins in Ceramic Packaging - Identification of Latent Defects in Advanced Glass Ceramic MCM Packaging - Electrostatic Discharge (ESD) and Latchup Failures in Advanced CMOS Technologies - Electrical and Optical Characterization of Latchup - Failure Analysis of Microelectromechanical Systems (MEMS) - Failure Analysis of Passive Components - Failure Analysis and Reliability of Optoelectronic Devices - Die-level Fault Localization with X-ray Microscopy - X-ray Microtomography Tools for Advanced IC Packaging Failure Analysis - Acoustic Microscopy of Semiconductor Packages - Electronic Package Fault Isolation Using TDR - Current Imaging using Magnetic Field Sensors - Chip access techniques - Low Stress FA Sample Preparation of Flip Chip Devices with Low-K Dielectric Interconnect Layers - Plastic BGA Module FA Process Flow Development - Chip-Scale Packages and Their Failure Analysis Challenges - Backside Analysis Using Re-Package Techniques - Photon Emission Microscopy - Fundamentals of Photon Emission (PEM) in Silicon – Electroluminescence for Analysis of Electronic Circuit and Device Functionality - Picosecond Imaging Circuit Analysis – PICA - Thermal Defect Detection Techniques - Thermal Failure Analysis by IR Lock-in Thermography - Beam-Based Defect Localization Methods - Principles of Thermal Laser Stimulation Techniques - Introduction to Laser Voltage Probing (LVP) of Integrated Circuits - SEM and FIB Passive Voltage Contrast - Electron Beam Probing - Delayerimg Techniques: Dry Processes Wet Chemical Processing and Parallel Lapping - Plasma Delayering of Integrated Circuits - The Art of Cross Sectioning - Delineation Etching of Semiconductor Cross Sections - Special Techniques for Backside Deprocessing - Deprocessing Techniques for Copper, Low K, and Soi Devices - PCB SMT Solder Joint Failure Analysis - Improved Methodologies for Identifying Root-Cause of Printed Board Failures - Optical Microscopy - Scanning Electron Microscopy - Ultra-high Resolution in the Scanning Electron Microscope - Focused Ion Beam (FIB) Systems: A Brief Overview - Transmission Electron Microscopy for Failure Analysis of Integrated Circuits - Atomic Force Microscopy: Modes and Analytical Techniques with Scanning Probe Microscopy - Energy Dispersive X-ray Analysis - Analysis of Submicron Defects by Auger Electron Spectroscopy (AES) - SIMS Solutions for Next Generation IC Processes and Devices - Submicron CMOS Devices - Reliability and Quality Concepts for Failure Analysts - CAD Navigation in FA and Design/Test Data for Fast Fault Isolation - Best of the EDFAS Email Discussion Forum 2000-2004 - Failure Analysis Roadmaps - Assembly Analytical Forum Analytical Tool Roadmap ISTFA 2003 Rev 0 White Paper - Education and Training for the Analyst - Managing the Unpredictable – A Business Model for Failure Analysis Service - Management Principles and Practices for the Failure Analysis Laboratory - Failure Analysis Terms and Definitions - JEDEC Standards for Failure Analysis - Education/Training Sources and References - ISTFA Subject Index "

"Contents : - Foreword - The Microelectronics Desk Reference - System Level Failure Analysis Process: Making Failure Analysis a Value Add Proposition in today’s High Speed Low Cost PC environment - Board Level Failure Mechanisms and Analysis in Hand-held Electronic Products - Failure Analysis Flow for Package Failures - Wafer Level Failure Analysis Process Flow - Flip-Chip and “Backside” Sample Preparation Techniques - Failure Analysis in a Fabless/Outsourced World - Circuit Edit at First Silicon - The Process of Editing Circuits Through the Bulk Silicon - Curve Tracer Data Interpretation for Failure Analysis - A Primer on Simple Device Problems and Curve Tracer Characteristics - Electronics and Failure Analysis - Analog Device and Circuit Characterization - IC Testing: Background, Directions and Opportunities for Failure Analysis - Using Scan Based Techniques for Fault Isolation in Logic Devices - The Power of Semiconductor Memory Failure Signature Analysis - Common Defects Encountered During Semiconductor Manufacturing - System Level Board Fabrication and Assembly Process Anomalies and Associated Failures Categories - Characterization of Anomalies in Flip-Chip Solder Joins in Ceramic Packaging - Identification of Latent Defects in Advanced Glass Ceramic MCM Packaging 181 Electrostatic Discharge (ESD) and Latchup Failures in Advanced CMOS Technologies - Electrical and Optical Characterization of Latchup - Failure Analysis of Microelectromechanical Systems (MEMS) - Failure Analysis of Passive Components - Failure Analysis and Reliability of Optoelectronic Devices - Die-level Fault Localization with X-ray Microscopy - X-ray Microtomography Tools for Advanced IC Packaging Failure Analysis - Acoustic Microscopy of Semiconductor Packages - Electronic Package Fault Isolation Using TDR - Current Imaging using Magnetic Field Sensors - Chip access techniques - Low Stress FA Sample Preparation of Flip Chip Devices with Low-K Dielectric Interconnect Layers - Plastic BGA Module FA Process Flow Development - Chip-Scale Packages and Their Failure Analysis Challenges - Backside Analysis Using Re-Package Techniques - Photon Emission Microscopy - Fundamentals of Photon Emission (PEM) in Silicon – Electroluminescence for Analysis of Electronic Circuit and Device Functionality - Picosecond Imaging Circuit Analysis – PICA - Thermal Defect Detection Techniques - Thermal Failure Analysis by IR Lock-in Thermography - Beam-Based Defect Localization Methods - Principles of Thermal Laser Stimulation Techniques - Introduction to Laser Voltage Probing (LVP) of Integrated Circuits - SEM and FIB Passive Voltage Contrast - Electron Beam Probing - Delayerimg Techniques: Dry Processes Wet Chemical Processing and Parallel Lapping - Plasma Delayering of Integrated Circuits - The Art of Cross Sectioning - Delineation Etching of Semiconductor Cross Sections - Special Techniques for Backside Deprocessing - Deprocessing Techniques for Copper, Low K, and Soi Devices - PCB SMT Solder Joint Failure Analysis - Improved Methodologies for Identifying Root-Cause of Printed Board Failures - Optical Microscopy - Scanning Electron Microscopy - Ultra-high Resolution in the Scanning Electron Microscope - Focused Ion Beam (FIB) Systems: A Brief Overview - Transmission Electron Microscopy for Failure Analysis of Integrated Circuits - Atomic Force Microscopy: Modes and Analytical Techniques with Scanning Probe Microscopy - Energy Dispersive X-ray Analysis - Analysis of Submicron Defects by Auger Electron Spectroscopy (AES) - SIMS Solutions for Next Generation IC Processes and Devices - Submicron CMOS Devices - Reliability and Quality Concepts for Failure Analysts - CAD Navigation in FA and Design/Test Data for Fast Fault Isolation - Best of the EDFAS Email Discussion Forum 2000-2004 - Failure Analysis Roadmaps - Assembly Analytical Forum Analytical Tool Roadmap ISTFA 2003 Rev 0 White Paper - Education and Training for the Analyst - Managing the Unpredictable – A Business Model for Failure Analysis Service - Management Principles and Practices for the Failure Analysis Laboratory - Failure Analysis Terms and Definitions - JEDEC Standards for Failure Analysis - Education/Training Sources and References - ISTFA Subject Index "

"Contents :- Microelectronics failure analysis desk reference, 2001 supplement - Preface - Microelectronic Failure Analysis Desk Reference 2001 Supplement - FIB Backside Isolation Techniques - The SEM Lab, From Laboratory Logistics to Final Sample Preparation Techniques for SEM Analysis of Semiconductors - Cross Sectioning with a Pivoting Sample Block - Focused Ion Beam Cross Sectioning as a Compliment or an Alternative to Conventional Mechanical Sectioning Techniques - Alternatives to Cross-Sectional Simple Preparation for Package and Board-Level Failure Analysis - Automation To Boost Productivity And Increase Repeatability: (A Sampling of Available Tools and Vendors) - Multi-Functional, Semi-Automatic Sample Preparation for Failure Analysis - SMPT©-Sub-Micron Polishing Technology For Automated Sample Preparation - Automated Techniques For SEM And TEM Sample Preparation - Sample Preparation Techniques for Site-Specific Cross-Sectional Analysis of High-Aspect-Ratio FIB Repair Sites - Deprocessing, Cross-Sectioning and FIB Circuit Modification of Parts Having Copper Metallization - Scanning Capacitance Microscopy of Junction and Non-Junction Samples - Electrical Probing of Deep Sub-Micron Integrated Circuits Using Scanning Probe Techniques - Application of Tunneling Atomic Force Microscopy (TUNA) to Failure Analysis - GoFATA: Glossary of Failure Analysis Tool Acronyms - ISTFA Subject Index "