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Improved floating point multiplier design based on canonical sign digit
" Improved floating point (FP) multiplier based on canonical signed digit code (CSDC) has been reported in this paper. Array structure was implemented through Hatamain’s scheme of partial product generation along with Baugh-Wooley’s (B.W) sign digit multiplication technique. Moreover, CSDC approaches were used for the addition of partial products in constant time without carry propagation and independent of operands. The functionality of these circuits was checked and performance parameters, such as propagation delay, dynamic switching power ... "
Depok: Faculty of Engineering, Universitas Indonesia, 2014
UI-IJTECH 5:1 (2014)
Artikel Jurnal  Universitas Indonesia Library