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"Stress Induced Leakage C urren! (SILC) telah menjadi suatu fenomena tersendiri dalam perkembangan divais MOSFET. SILC yang lbih dikenal dengan nama arus bocor ini, hadir setting dengan berkembangnya teknologi mikron dalam sebuah divais MOSFET. Berbagai penelitian telah dilakukan demi memperoleh suatu pengertian baku yang mampu menjelaskan keseluruhan fenomena SILC ini, Diharapkan dari pengetahuan dan penelitian yang ada, arus SILC dapat diatasi, walaupun sebenarnya hal ini masih menjadi tanda tanya besar. Sejauh ini SI]_.C dqelaskan dalam bebempa model, di antaranya adalah model _field enhancement dan model trap-assisted.SILC juga dimsakan mengganggu proses kenja sebuah divais memori. Dalam proses write dan erase sebuah divais memori, SILC seringkali menyertai perpindahan muatan yang disimpan dalam sebuah divais memori. Hal ini dapat menyebabkan terganggunya besar muatan yang disimpan oleh divais tersebut_ Divais memori dalam proses kerjanya menggunakan fenomena Fowler-Nordheim (FN) tunneling, sebagai fenomena penyimpanan muamn.Dalam skripsi ini dilakukan penelitian perbandingan antara arus SILC dan arus FN. Hasil perbandingan tersebut memberi hasil bahwa, antara arus SI]..C dan ams FN terdapat sam buah titik potong, yang kemudian dinamakan titik balik. Pada saat nilai pembengkokan pita energi bemilai % dari smj`aee potential, titik balik terletak pada tegangan gate -1.633 V dan -1.733 V untuk hasil LOGEST. Pada saat nilai pembengkokan pita energi bemilai % dari surface potential, titik balik terletak pada tegangan gate -1_524 V dan -1.575 V untuk hasil LOGEST_Berdasarkan analisa yang dilakukan, juga diperoleh bahwa saat tegangan gate belum menqapai nilai titik balik, maka ants yang mengalir melalui lapisan gme-oksida-silikon, sama besar dengan nilai arus SILC.itu sendiri."

"Annealing effect on the electrical properties change of P - type 6H-Sic schottky diodes with SiO2 ramp profile after irradiated up to 1.75 MGy at RT (Room Temperature) were investigated. A perpendicular edge termination based on oxide ramp profile around the schottky contact is used on Al schottky rectifier fabricated on a 10 um p--type 6H-SiC epi-layer on P-type 6H-SiC substrate (3.5 off, Si face) Na : 5.9 x 10 15/cm2"

"Trend penggunaan peralatan elektronika daya sesungguhnya tidak hanya ada di industri saja, namun sudah merambah pemakaian di skala rumah tangga. Peralatan elektronik seperti lampu hemat energi, lampu LED, UPS, dan perangkat lainnya yang menggunakan elektronika daya memiliki kontribusi terhadap total distorsi harmonisa di dalam jaringan listrik. Arus bocor merupakan arus yang mengalir dari kawat fasa ke tanah, secara umum berkaitan dengan kapasitansi antara fasa dengan tanah. Kapasitansi ini dapat bersifat normal, parasitis, atau disebabkan oleh kegagalan kerja suatu komponen, masalah pengkawatan dan turunnya kemampuan insulasi. Harmonisa memiliki komponen frekuensi tinggi di dalamnya, sehingga dapat menurunkan kapasitansi antara kawat fasa dengan insulasi. Sehingga arus bocor dapat meningkat dengan adanya frekuensi tinggi di dalam kawat ini. Arus bocor yang cukup tinggi dapat memicu bekerja nya perangkat proteksi arus bocor atau dapat menimbulkan resiko tersengat listrik pada sistem yang tidak dilengkapi oleh perangkat proteksi tersebut.

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The trends of power electronic usage are not only happening in world of industry, but it is also already happening in household appliances. Electronic equipment such as fluorescence lamp, LED lamp, Uninterruptible power supply, and other equipment that use power electronics have a definite contribution to total harmonic distortion in the system.

Leakage current is the current that flows from phase wire to the ground. Generally it is related to capacitance between phase and earth. The capacitance could be normal, parasitic, or caused by component failure, wiring problems and degradation of insulation level.

Harmonic that have high frequency component inside of it could reduce the insulation capacitance between phase and earth, that will be tend to cause larger earth leakage. If the earth leakage high enough it could trigger the earth leakage protection device or it will increase the possibility of electrical shock risk on the system that not completed by those protective device."

"FinFET (Fin Field-EffectTransistor) technology has recently seen a major increase in adoptionfor use in integrated circuits because of its high immunity to short channeleffects and its further ability to scaledown. Previously, a major research contribution was made to reduce the leakage current in theconventional bulk devices. So many different alternatives like bulk isolation and oxide isolation are all having some pros andcons. Here in this paper, we present a novel pile gate FinFET structure toreduce the leakage current, as compared with Bulk FinFET without using any pstop implant orisolation oxide as in theSilicon-on-Insulator (SOI). The major advantage of this type ofstructure is that there is no need of high substrate doping, a 100% reduction in therandom dopant fluctuation (RDF) and an increase in the ION/IOFFvalue. It can be very useful to improve the drain-induced barrier lowering (DIBL) at smallertechnological nodes. All the work is supported by 3D TCAD simulations, using Cogenda TCAD."

"FinFET (Fin Field-Effect Transistor) technology has recently seen a major increase in adoption for use in integrated circuits because of its high immunity to short channel effects and its further ability to scale down. Previously, a major research contribution was made to reduce the leakage current in the conventional bulk devices. So many different alternatives like bulk isolation and oxide isolation are all having some pros and cons. Here in this paper, we present a novel pile gate FinFET structure to reduce the leakage current, as compared with Bulk FinFET without using any pstop implant or isolation oxide as in the Silicon-on-Insulator (SOI). The major advantage of this type of structure is that there is no need of high substrate doping, a 100% reduction in the random dopant fluctuation (RDF) and an increase in the ION/IOFF value. It can be very useful to improve the drain-induced barrier lowering (DIBL) at smaller technological nodes. All the work is supported by 3D TCAD simulations, using Cogenda TCAD."