Coppola, Marcello
Design of cost-efficient interconnect processing units : Spidergon STNoC
CRC Press, 2009
Multimedia
Design of cost-efficient interconnect processing units: spidergon STNoC
Marcello Coppola; Miltos D. Grammatikakis; Riccardo Locatelli; Giuseppe Maruccia; Lorenzo Pieralisi
CRC Press, 2009
Buku Teks
Colclaser, Roy A.
Microelectronics : processing and device design
John Wiley & Sons, 1980
Buku Teks
Fu, Bo
Error control for network-on-chip links
[, Springer], 2012
eBooks
Networks-on-chip ; from implementations to programming paradigms / editor-in-chief, Zhiying Wang ; authors, Sheng Ma ...[et al.]
Morgan Kaufmann, 2015
eBooks