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"Contents :- IPFA 2002 Best Paper Award Winner - SEM/SThM-Hybrid-System: A New Tool for Advanced Thermal Analysis of Electronic Devices - From Microns to Molecules–Can FA Remain Viable Through the Next Decade? - Soft Defect Localization (SDL) on ICs - Fault Localization and Functional Testing of ICs by Lock-in Thermography - Visualisation of Electrically Active Areas Using Electron Holography - A Study of Photoelectron Emission Microscopy Contrast Mechanisms Relevant to Microelectronics - Application of Acoustic Fourier Domain Imaging for the Evaluation of Advanced Micro Electronic Packages - Orientation Imaging Microscopy Applications in Cu-Interconnects and Cu-Cu Wire Bonding - Materials Analysis and Process Monitoring in MegaFabs - STEM (Scanning Transmission Electron Microscopy) in a SEM (Scanning Electron Microscope) for Failure Analysis and Metrology - Microcalorimeter Energy Dispersive X-Ray Spectroscopy in Routine Semiconductor Failure Analysis - A Working Method for Adapting the (SEM) Scanning Electron Microscope to Produce (STEM) Scanning Transmission Electron Microscope Images - Applications of EELS to Semiconductor Devices Failure Analysis by Using a 300 keV TEM - Laser Milling Methods for Package Failure Analysis - Laser Decapsulation of Transfer Molded Plastic Packages for Failure Analysis - Investigation of Microstructure Change on Ni-based UBM Systems in Lead Free Solder - Failure Analysis Strategy For 2 Stacked Die CSP - Evaluation of Package Defects by Thermal Imaging Techniques - Backside Hot Spot Detection - Optimizing Backside Image Quality - Infrared Microthermography for Integrated Circuit Fault Location; Sensitivity and Limitations - Failure Analysis of Tungsten Contact Failure in a 0.13 um CMOS Process - Backside Photoemission and Infrared Microthermography for Rapid Debug of Compound Semiconductor Devices - Laser-Voltage-Prober Measurements on Bipolar Devices - Application of Focused Ion Beam in Debug and Characterization of 0.13 um Copper Interconnect Technology - Thin-Die Flip Chip Physical-FA Process Flow - Failure Mechanism and Rootcause Analysis of UBGA Solder Ball Contamination - Passivation Damage and Residue-Induced Package Failure Analysis For a 16 Lead SOIC GaAs RF/IF Package - Study on a Single NFET Degradation After Circuit Modification with FIB - New Techniques to Improve the Efficiency of TEM Sample Preparation - A Transmission X-Ray Microscope (TXM) for Non-Destructive 3D Imaging of ICs at Sub-100 nm Resolution - A Broadband Model for Ultrasonic Pulses in the Presence of Thin Layers in Microelectronics - Beam-Based Localization Techniques for 0.18 um IC Failure Analysis after Reliability Test - Methodologies for Isolating Faults in Multi Chip Fiber Optic Transceivers that Use GHz Mixed Signal ICs - Application of Various Fault Localization Techniques to Different Types of 6T- SRAM column Failures - Missing Metal Pillar Failure Analysis-A Plug Technology Issue - Reliability and failure analysis of RF MEMS switches - Failure Analysis of Polysilicon Micromirror Arrays - Failure Analysis of the Digital Micromirror Device - Wavefront Coded Imaging Systems for MEMS Analysis - Sample preparation for Vertical Transistors in DRAM - A Methodology to Reduce Ion Beam Induced Damage in TEM Specimens Prepared by FIB - CMOS Backside Deprocessing With TMAH/IPA as a Sample Preparation Procedure for Failure Analysis - Investigation of Choline Hydroxide for Selective Silicon Etch from a Gate Oxide Failure Analysis Standpoint - In situ Decapsulation of Plastic Encapsulated Devices Mounted to a Printed Circuit Board - A Standardized Scientific Method Formulation for Failure Analysis Application - Probeless FA Approach: a Breakthrough Simulation Based Failure Analysis Method - Electrical Faults Captured by In-Line E-beam Inspection and Failure Analysis - Effect of Corner Underfill Voids on Chip Scale Package (CSP) Performance Under Mechanical Loading - Leakage Isolation of Mixed-Signal Devices at Operating Modes - Method for Measuring Package to Board Interconnection Shear Strength for Area Array, Fine Pitch Packages - Picosecond Imaging Circuit Analysis of Leakage Currents in CMOS Circuits - Scanning SQUID Microscopy for Die Level Fault Isolation - A Successful Failure Localization Approach for Defect Identification on High Resistance Interconnects - Backside FIB Device Modifications Through the BOX Layer of an SOI Device - Coax"

"Tujuan penelitian ini adalah untuk menganalisis sumber daya dan kapabilitas sebagai sumber keunggulan kompetitif pada Jakarta Design Center. Dengan menggunakan jenis penelitian kualitatif, tehnik pengambilan data dengan cara wawancara dan dokumentasi data sekunder, dan penggunaan Resource-Based View RBV dengan kerangka kerja VRIO, yang terdiri dari bernilai, langka , tidak mudah ditiru , dan terorganisasi dengan baik oleh perusahaan, maka didapatkan hasil penelitian bahwa terindentifikasi tiga belas jenis sumber daya dan lima belas kapabilitas yang dimiliki oleh Jakarta Design Center. Empat sumber daya dan lima kapabilitas diantaranya memenuhi kriteria VRIO sehingga dapat dijadikan sebagai sumber keunggulan bersaing.

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The purpose of this research is to analyze resources and capabilities as source of competitive advantage at Jakarta Design Center. With using qualitative type of research, data collection using interview and secondary data documentation and using Resource Based View RBV approach with VRIO framework which is consisting of value, rare, imperfectly imitable and organization, the result of this research said that thirteen resources and fifteen capabilities has been identified at Jakarta Design Center. Four resources and five capabilities are meet with VRIO criteria that can be count as source of competitive advantage."